Seeking Alpha published an article last week written by a short-seller of EZchip Semiconductor (EZCH) – a designer of Ethernet Network Processing Units (NPUs) for networking equipment. The bearish author convincingly recounts the recent lackluster earnings performance of EZCH, which explains why their stock price is already down 37% from its high this year. That author then proceeds to project disappointing forward performance to justify his case for further shorting. But, the past history of EZCH is already priced in – the real trick is to more accurately project their future performance, and I will present a different perspective here by refuting the major negative points in the prior SA article, then expounding upon the bullish case for EZchip.
TAM (Total Available Market) Growth Projections – NPUs to Displace ASICs
The bearish SA article states that the high speed merchant NPU market is only $120 million while suggesting that EZCH’s market cap is overvalued at 8 times that amount. Let’s break that claim down: EZCH published its revenue projections in its Q3 2012 Corporate Presentation (this is a must read for anybody taking any position in EZCH). It reports that the high speed “merchant” NPU market in 2011 was $130 million, and that is 14% of the total NPU market of $950 million (which includes both merchant and in-house NPUs ASICs). EZCH projects a reasonable growth for the entire aggregate market from $950 million to $1270 million by 2016, of which they anticipate the merchant portion in 2016 will grow to $400 million (31%) after displacing in-house ASICs. The latter clause is a critical portion of the projection which the prior bearish article seemingly ignored.
EZCH (which owned about 2/3 of the merchant NPU market in 2011 and even more now) was just gaining a toehold with their NP-3 chip at Tier 1 CESR vendors Cisco (CSCO) and ZTE (ZTCOY.PK) back in 2011 when the merchant portion of the total NPU market was only 14%. In 4Q2012, EZchip’s next generation NP-4 chip will be employed in far more platforms at both Cisco and ZTE while also adding Tier 1 vendors Ericsson (ERIC), Huawei, and Tellabs (TLAB). Deployments of EZchips are spreading rapidly at those vendors as they replace in-house ASICs with EZchip NPUs in existing or new network boxes.
Also, the business model of EZchip’s target CESR (Carrier Ethernet Switches Routers) market involves the network equipment vendors (i.e. Cisco) selling each chassis to carriers who add line cards (populated with EZchips) over time. So, every carrier router/switch sold by a vendor is a potential ongoing source of revenue for EZCH (not just a 1-time EZCH revenue source). As these boxes get deployed across the world, they build a critical mass of potential continuing revenue sources for EZCH. So, their projection for the “merchant” share of the total high speed ASIC+NPU market to grow from 14% to 31% by 2016 is very achievable, and possibly too conservative given the viral design wins at 5 of the top 7 CESR vendors with their latest generation chip.
Furthermore, EZChips will be employed by many smaller vendors who can now enter this market due to the availability of the superior merchant silicon provided by EZCH. For example, the NP-4 also supports OpenFlow, thus creating a new market which is not even counted in the projections. Note the comments from an OpenFlow developer which stated:
The trick lies in the NP-4 network processors from EZchip. These amazing beasts are powerful enough to handle the linked tables required by OpenFlow 1.1; the researchers just “had” to implement the OpenFlow API and compile OpenFlow TCAM structures into NP-4 microcode. I have to admit I’m impressed…they got very far very soon using off-the-shelf hardware (EZchip), so it shouldn’t be impossibly hard to repeat the performance and launch a commercial product.
Once You Embark with EZchip, You Don’t Jump Ship
The bearish SA article also suggests that “Major customer Cisco will also be playing EZCH against Broadcom (BRCM) and Marvell (MRVL) as well as its own internal ASIC design teams. The research also notes many CESR customers are in-sourcing NPUs and the underlying CESR market is growing slowly.”
These claims are false or misleading. EZCH design wins are very sticky, which means it takes a tremendous amount of resource and time to incorporate EZchips into Router/switch designs. This is one of the reasons why the anticipated “hockey stick” growth has not yet materialized, but it is also the reason their market share dominance, once established, will be very difficult to displace. The only case where an EZCH customer left is Juniper (JNPR), and they had only been using the simple Layer 2 functions of the EZchip as a placeholder in their designs (not the more complex Layer 3 functions or other components added in the NP-4 and planned for the NP-5). Yet, it took Juniper years of planning and additional product certification delays to get weaned off EZCH by moving to a design which involves multiple Juniper chips to replace the function of a single EZchip. The current EZchip customers are employing the full functionality of the EZchip and have made enormous investments in microcode development, thus making it prohibitively expensive to rip out EZCH from their designs. While there is only 1 example of an EZCH customer reverting to an “in-house” ASIC, many vendors are now choosing EZCH over their prior in-house ASIC designs.
The Paradigm Shift to Ethernet Favors EZCH
To properly evaluate EZCH’s future prospects, one needs to better understand their customers’ industry. The EZchip NPU is an Ethernet processor. This alone is another overlooked growth factor, as Ethernet is quickly becoming the dominant Layer 2 protocol across the entire network hierarchy. Historically, Ethernet was only employed for LAN switching. Today, Ethernet is being increasingly deployed for WAN routing, and for all portions of the network hierarchy, including Access, Distribution, and Core.
In the past, business access to a service provider or private WAN (Wide Area Network) was provided by Layer 2 protocols such as Frame Relay, ATM, PPP, or POS via transport methods such as full or fractional T1, DS3, or OC-3 circuits. The same is also true of the cell towers which originally used T1 circuits for backhaul. Today, both businesses and cell towers are moving toward Ethernet access to the WAN backbone to benefit from higher access capacity.
In the core, the state-of-the-art trunk circuits for service provider carrier backbones is currently the OC-768 SONET standard, providing a maximum single-link capacity of 40 Gbps. Core networks are now starting to deploy 100 Gbps Ethernet (supported by the current EZchip). Of course, the biggest migration to Ethernet is occurring in the Distribution layer encompassing Ethernet Aggregation and Edge Routing which comprise the heart of EZchip’s current target market.
So, the networking industry’s move toward Ethernet everywhere is an often overlooked growth factor for the Ethernet NPU market in general, thus for EZCH.
What Does the Future Hold?
EZCH has provided a roadmap for the remainder of the decade delineating multiple future generations of their NPUs with significant feature and performance enhancements, making it far more cost effective to continue with EZCH. As for the competition, I will explain later how EZCH is superior to them. Regarding the purported slow growth in the overall CESR market, that is changing now that the proliferation of Smartphones, mobile video, cloud computing, and 4G/LTE is forcing the carriers to upgrade the backhaul from their cell towers to their backbones via high speed Ethernet. As evidence, ATT recently announced plans to spend $14 Billion on infrastructure improvements over the next 3 years.
So, the author of the bearish SA article about EZCH has apparently assumed very little future growth past 2011 in carrier networks, a sudden halt to the paradigm shift toward ubiquitous Ethernet, no displacements of in-house ASIC designs by EZCH coming to market after 2011, and no new vendors spawned from the availability of EZCH merchant silicon – all are assumptions I have refuted by demonstrating what is actually happening in the industry today.
GARP Valuation – Growth at A Reasonable Price
The last criticism of the bearish SA article suggests that EZCH could be priced at 5 times this year’s revenues. For a high margin business model, it is profits that matter most. EZCH’s net margins are 50% and rising since their growing Cisco sales are accounted as royalties (100% profit) and their Operating Expenses are projected to grow less rapidly than revenues. So, the author has really suggested that the EZCH P/E multiple should be less than 10 times trailing earnings without considering that their projected growth rate warrants a much higher P/E and also that it should be based on future earnings, not trailing earnings. The latter may be appropriate for a company with an established and slow growth revenue base, but future earnings and high P/E multiples are commonly used for companies with high growth projections.
Also, the author of the other article ignores that EZCH is debt-free with $5.70/shr in cash (41% of the author’s target stock price).
The shorts have enjoyed a nice ride down in EZCH’s share price over the last 9 months due to disappointing earnings growth in 2012, and 2012 was indeed a disappointing year for EZCH. But, that was due to a combination of temporary factors, such as slow carrier spending (a trend which is changing next year per ATT) and transitioning many new customers to the new NP-4 platform. There is no fundamental problem with EZCH and no execution problem to fix – they already “closed the sale” to their direct customers (CESR vendors) long ago when they garnered the design wins for the NP-4 and started shipping samples for their customers to integrate into their router product lines. Now, they need only wait for their customers to do the selling of the new routers and line cards housing EZChips.
Competitive Threats Overrated
Now, I would like to address the question of competition from Broadcom etc. In the CESR market, EZCH currently has all of the merchant NPU design wins, and I see no reason for this to change. I discussed previously why EZCH’s design wins are very sticky and difficult to displace by another merchant. Additionally, no competitor has yet provided a proven superior product. Some may announce competitive products whose high-level “feeds and speeds” (capacity specifications) seem to match EZCH’s chips, but deep investigation shows the competition falls short. For example, BRCM recently announced a planned competitor NPU with bits/sec performance claims exceeding those of the currently available EZchip. However, it appears their benchmark was based upon unrealistic WAN traffic mix assumptions. I will elaborate:
1st, one must understand that the performance of any network packet processor (whether it be a router, switch, its CPUs, ASICs, or NPUs etc.) is really determined by its pps (packets/sec) capacity and the pps depends upon many variable factors, such as number of operations performed per packet, features employed per packet, caching opportunities, table lookups, etc. So, a chip vendor can produce a benchmark whose conditions were contrived to require few operations per packet (more realistic for a simple low-feature LAN switch), thus yield a high pps throughput. But, this might not represent a realistic production environment for a feature-rich WAN router.
Also, when modeling a processor’s pps capacity, to convert it to a BW-rated capacity (since that is how an Ethernet port is rated), an assumption must be made regarding the average packet size. Specifically, the Ethernet packet size might range in size between 64 – 1500 bytes (assuming standard non-jumbo Ethernet frames). So, a vendor could provide an NPU’s capacity converted from pps to bps (bits/sec) to relate to the BW-oriented mindset of most people, and they might use a 1500 byte packet size in their model. This would dramatically overestimate the true bps-rated capacity of the processor since the real traffic pattern will consist of a mix of multi-media packets where many are much smaller than 1500 bytes.
So, when BRCM announced their latest planned NPU’s capacity, they did not mention the packet size assumption, so we do not know if they overestimated their “real-world” processing capacity by using large packets. But, EZCH documented in their “Traffic Management” presentation (from the Linley conference) that they use “real-life average packet size scenarios” and later indicated this meant 300 byte packets on average. So, if BRCM modeled for 1500 bytes while EZCH modeled for 300 bytes, then the EZCH performance is understated by 5-fold when compared to BRCM.
But, that’s not all. BRCM did disclose at the Linley Conference QA session that they model only 2 table lookups per packet. This is an unrealistically low number for a WAN router (it is more realistic for a low-feature LAN switch), and possibly chosen since their lack of an integrated TCAM makes extra lookups very computationally expensive, thus degrading throughput as the number of lookups increases. EZCH, on the other hand, assumes 9 lookups for their model, so they are understating their performance relative to BRCM by more than 4-fold when considering table lookups. Note that EZCH will be integrating a TCAM into their NP-5 design, thus allowing for a much higher number of lookups without the performance hit that the BRCM chip would suffer in a full-feature router.
So, when using real world variable-sized packets in a multi-media environment requiring special features (i.e. like those supported by the carriers in EZCH’s target market), the EZCH NPU is likely to outperform the BRCM NPU.
But, don’t just take my word for it – ask Cisco, ZTE, Ericsson, Huawei, Tellabs, Ciena (CIEN), Acme Packet (APKT), Arris (ARRS), 3COM, etc. which vendor they chose as their NPU merchant.
My final major topic pertains to the ground-breaking network product which EZCH announced on September 5 which is not even considered at all by the author of the bearish SA article, nor is it factored into any of the revenue and financial analysis above. The new EZchip NPS (Network Processor for Smart Networks) product line is a game-changer. It is truly revolutionary. The EZCH NPS integrates functions in a single chip which are now currently spread across multiple chips (CPU, ASICs, NPUs, etc.) on multiple cards and usually on multiple devices and involving multiple vendors (i.e. Netlogic (NETL), BRCM, Cavium (CAVM), plus many in-house chips). The EZCH NPS will do this while also providing never-before seen performance, power and space efficiency, and programming flexibility. While prior chips from EZCH and other silicon merchants only attempted to perform DPI (Deep Packet Inspection) on a subset of layers 2-7 in the OSI networking model, the new EZCH NPS handles all of the layers 2-7, and it does it at wire speed for the fastest supported interface/link speeds in the industry.
The EZCH CEO noted that the NPS includes a TM (Traffic Manager – this is a unique advantage of the latest EZCH NPU), DPI at layers 2-7, Security functions, Search Engines, 400 Gigabits/sec throughput (while processing layers 2-7), C programming language, and Linux OS. It will target the carrier, cloud, and data center spaces – this is a huge expansion beyond EZCH’s current addressable market. And it will support SDN (Software Defined Networks), OpenFlow, and Virtualization. These are key and critical features. Making it C-programmable opens its use up to the most well-known high-level (very flexible) programming language, thus making it easily adoptable. Making it Linux-based opens it up to a huge Unix/Linux community. Including SDN and OpenFlow allow EZCH to lead the industry’s big move into virtualization and software-defined networks, thus removing their exposure to being tied to any specific network equipment vendor or type of box.
In one move, EZCH has thrust themselves into the rapidly growing cloud-computing and data center space. They have positioned themselves to potentially displace existing chips or future design wins from NETL, CAVM, BRCM, etc.. They have created the potential for a server or router vendor (i.e. Cisco) to merge functions provided by multiple devices today (i.e. firewalls, load-balancers, content switches, data accelerators, etc. produced by companies like Riverbed (RVBD), Juniper, Cisco, F5 (FFIV), Blue Coat (BCSI) etc.) into a single line card on a single router, thus saving significant costs for service providers while providing superior performance. They have created potential use cases and integration that I cannot yet even imagine.
For more information on the NPS, see the article “EZchip Breaks the NPU Mold“
Also see EZchip’s NPS presentation.
With the introduction of the NPS chip line following the next generation NP-5 NPU, EZCH will leapfrog the competition and expand into the Data Center market. So, the bearish article’s claims of future market share erosion for EZCH are completely backwards. Rather, the opposite is true.
EZCH’s target market will grow today due to the shift to Ethernet for all portions of the network and also due to the proliferation of cloud computing, Internet video, and mobile devices which drive network capacity upgrades.
EZCH’s share of that growing market will rise in the short-term due to their NPUs displacing in-house ASICs.
EZCH will expand into new markets over the long-term by already-announced new products targeting data center, access, and possibly even core.
This is the “Age of the Network”, and EZCH is poised to play the role of Intel in this space. Just as Intel opened up the PC markets to major vendors like IBM (IBM) as well as their clones, EZCH will do the same for the networking equipment markets over the next decade.
I am not a market timer, nor can I predict the exact timing of EZCH’s fundamental rise. But, I am confident their ascent is coming, and shorts would be well served by covering while the stock price still has its 2012 performance overhang.
Disclosure: I am long EZCH. I wrote this article myself, and it expresses my own opinions. I am not receiving compensation for it. I have no business relationship with any company whose stock is mentioned in this article.